FAQ on Hot Swap: from “don’t dare do it” to “it’s now OK to do” part 2

Designing a hot-swap controller is not trivial, as there are many conditions that must be acknowledged and addressed. The problem is aggravated by the increasing power and current levels of many of today’s boards — both are increasing dramatically — which puts severe current-handling and thermal strain on the current-pass MOSFET, which the high-level view does not reveal, as shown in Figure 1.

Q: What does the internal structure of a basic hot-swap controller look like?
A: The controller has a current-sense amplifier (CSA) that is connected to a comparator to indicate an overcurrent condition, as seen in Figure 2. The comparator maximum-current trip point is determined by the shunt resistance of the CSA, the amplifier gain, and the reference voltage; the shunt resistance value sets the maximum current. A timer circuit establishes a limit to the length of time a given overcurrent condition can exist before power is cut off by the external MOSFET. Note that nearly all hot-swap controllers use an external MOSFET, for two reasons: an internal one cannot handle more than fairly low current levels; also, the designer can select the optimal external MOSFET to meet various and often conflicting performance parameters, starting with the current it must handle.

Figure 2. The internal block diagram of a simple hot-swap controller begins to reveal the internal complexity. (Image: Analog Devices)

Q: This seems straightforward enough — so what happens next?
A: Second-generation hot-swap controllers added a soft-start function. With this function, the overcurrent reference threshold is ramped up linearly rather than being a fixed value. This, in turn, forces the load current to follow in a similar manner and also ramp. An external soft-start capacitor sets the rate of this ramp, which needs different values depending on the maximum current and the application specifics.

Q: What is the major difficulty in devising a hot-swap controller for increasing large currents?
A: To ensure robust and reliable hot-swap operation, the MOSFET current and thermal stress should never exceed its ratings. At the same time, the MOSFET may be “forced” to go from zero to maximum current in a very short period, which may drive it to exceed its safe operating area (SOA) limits.

Q: What would cause the MOSFET to be stressed in this way?
A: There are multiple scenarios that might cause this stress, among them:

Normal start-up
A “hot short” where the output of the controller is shorted to ground when the controller is on and in normal operating mode
A start-up into a short circuit, which means powering up a board when the output and ground are shorted

Q: What can be done to protect the MOSFET from exceeding the SOA and suffering self-destruction?
A: In a gross simplification, many designs rely on a combination of power limiting and current limiting. The timer is used to shut off the FET if the stress duration exceeds the pre-set duration.

Figure 3 shows a start-up into a purely capacitive load. The Hot Swap controller will regulate the MOSFET’s gate voltage to maintain power dissipation, which is under the power limit, and also keep the input current under the current limit. Note that the inrush current increases as the output voltage V_OUT increases, because the drain-source voltage V_DS of the MOSFETs will decrease.

Figure 3. Voltage versus time with powering-limiting protection only. (Image: Texas Instruments)

Q: Sounds like the problem is solved — but is it really?
A: Of course not; things are rarely that easy. For designs with large load currents and load capacitances, using a power-limit-based start-up can be impractical due to unavoidable conflicts among the various tradeoffs in current, voltage, maximum values, and timing. For example, increasing load currents will reduce the size of the current-sense resistor that can be used, and this will increase the minimum power limit.

At the same time, the use of a larger output capacitor will result in a longer start-up time and require a longer timer period. Thus, a longer timer and a larger power limit setting are required, which places more stress on the MOSFET during a hot-short or a start into short. There are a few MOSFETs that can withstand this stress, and the existing ones are costly and have other design limitations.

Q: What can be done?
A: Clever designers have devised an alternative MOSFET “safety” scheme by limiting the inrush current with a “dv/dt” (rate of change of voltage versus time) control circuit shown in Figure 4. The dv/dt across the capacitor limits the slew rate of the gate and the output voltage, which in turn limits the inrush current. Always keep in mind that it is the voltage that drives the current into the MOSFET.

Figure 4. Adding a dv/dt limiting circuit adds further protection to the MOSFET. (Image: Texas Instruments)

Q: What does this do?
A: Figure 5 shows a typical start-up waveform. Note that the inrush current is constant, and the MOSFET power decreases as the V_OUTgoes up and V_DS decreases. The start-up into short circuit and hot-short will have similar waveforms as the power-limit-only circuit.

Figure 5. This is the voltage-slew and power-limited waveform that results from the added dv/dt circuit. (Image: Texas Instruments)

Using a dv/dt control circuit along with a power limit allows the designer to reduce the inrush current as necessary to ensure that the MOSFET can survive start-up, and reduce the timer as necessary to ensure that the MOSFET can survive start-up into a short and hot short.

Note that having this added circuitry does not eliminate the need for the designer to carefully study the SOA curves of possible MOSFET choices and ensure the selected device stays within that area.

Hot-swap controller design does not end here. There are additional functions and features that can be added, and these will be covered in the third part.