A review of SiC MOSFET performance data shows these devices have improved dramatically in a short time. And improvements are likely to continue.

Kevin M. Speer, PhD | Littelfuse, Inc.,
Sujit Banerjee, PhD | Monolith Semiconductor Inc.

Insulated gate bipolar transistors (IGBTs), first commercialized in the early 1980s, revolutionized the power electronics industry. Today, silicon carbide (SiC) devices are changing the power electronics world all over again. The IGBT gave us a transistor simultaneously capable of blocking high voltages with low on-state (i.e., conduction) losses and well-controlled switching. The device is limited, however, in how fast it may be switched, which leads to high switching losses, large and expensive thermal management, and a ceiling on power conversion system efficiency.

The advent of SiC transistors all but eliminates IGBT switching losses for similar on-state losses (lower, actually, at light load) and voltage-blocking capability, bringing high efficiency while reducing the overall weight and size of the system.

Although device-related SiC materials research began in the 1970s, the promise of SiC for use in power devices was most formally suggested in 1989 by prominent lGBT researcher B. Jayant Baliga. Baliga’s figure of merit served as additional motivation for scientists to continue advancing SiC crystal growth and device processing techniques. In the late 1980s, intense efforts were underway worldwide to improve the quality of SiC substrates and hexagonal SiC epitaxy. The improvements continued throughout much of the 1990s until the first commercial device was released in 2001 in the form of a SiC Schottky diode by Infineon.

For a few years following their release, SiC Schottky diodes experienced field failures that were traced to material quality and device architecture. There was rapid and drastic progress to improve the quality of substrates and epitaxy; meanwhile, a diode architecture known as the junction barrier Schottky (JBS) was used, which more optimally distributed the peak electric field.

In 2006, the JBS diode morphed into what is now called the merged p-n Schottky (MPS) structure, which maintains optimal field distribution but also allows for better surge capability by incorporating true minority carrier injection. Today, SiC diodes have proven reliability, demonstrating more favorable FIT rates even than silicon power diodes.

How the SiC MOSFET evolved

The SiC MOSFET has had its share of issues, most related to the gate oxide. The first signs of trouble were observed in 1978 when researchers at Colorado State University measured a messy transition region between the pure SiC and the grown SiO₂. Such a transition region was known to have high densities of interface states and oxide traps that inhibit carrier mobility and lead to instabilities in threshold voltage; numerous research publications later verified this phenomenon. Many in the SiC research community spent the late 1980s and 1990s further studying the nature of various interface states in the SiC-SiO₂ system.

Research in the late 1990s and early 2000s led to remarkable improvements in understanding the sources of interface states (whose density is abbreviated D_it), as well as reducing them and mitigating their negative effects. To mention a few noteworthy discoveries, oxidation in a wet environment – that is, using H₂O as an oxidation agent instead of dry O₂ – was observed to reduce D_it by two to three orders of magnitude. Also, the use of off-axis substrates was found to reduce D_it by at least an order of magnitude.

Last but certainly not least, the effects of post-oxidation annealing in nitric oxide – a process commonly called nitridation – were first discovered by Hai-feng Li and co-workers at Austrlia’s School of Microelectronics Engineering in 1997 to reduce D_it to extremely low levels. This was subsequently affirmed by six or seven other groups. It would be an egregious omission, of course, not to underscore the seminal contributions made by the bulk-growth and wafer-research community. These individuals have taken us from mere hexagonal SiC crystals called Lely platelets to 150-mm wafers that are virtually free of device-killing micropipes.

Commercially available 1,200-V SiC MOSFETs have come a long way in terms of quality over the past few years. Channel mobility has risen to suitable levels, oxide lifetimes have reached an acceptable level for most mainstream industrial designs, and threshold voltages have become increasingly stable. What is equally important from a commercial standpoint is that multiple suppliers have reached these milestones.

That brings us to today’s SiC MOSFET quality, including long-term reliability, parametric stability, and device ruggedness. Using accelerated time-dependent dielectric breakdown (TDDB) techniques, the oxide lifetime of Monolith Semiconductor’s MOS technology has been predicted by researchers at NIST to exceed 100 years, even at junction temperatures exceeding 200°C.

The NIST work used lifetime acceleration factors of applied electric field across the oxide (greater than 9 MV/cm) and junction temperature (up to 300°C); for reference, oxide electric fields used in practice are around 4 MV/cm (corresponding to V_GS = 20 V), and junction temperatures during operation are typically lower than 175°C. It is also worth noting that while a temperature-dependent acceleration factor is commonly seen in silicon MOS, it had not been seen by NIST for SiC MOS prior to its work with devices from Monolith Semiconductor.

Threshold voltage stability also has been convincingly demonstrated. High-temperature gate bias (HTGB) took place at a junction temperature of 175°C and under negative (V_GS = -10 V) and positive (V_GS = 25 V) gate voltages. As dictated by JEDEC standards, 77 devices from three different wafer lots were tested; observers saw no significant shift. Still another parameter set proven to be stable over the long term is the blocking voltage and off-state leakage of our MOSFETs. In high-temperature reverse bias (HTRB) tests, more than eighty samples were stressed for 1,000 h at V_DS = 960 V and T_J = 175°C, after which post-stress measurements revealed no change in drain leakage or blocking voltage. With respect to device ruggedness, preliminary measurements reveal a short-circuit withstand time of at least 5 µsec and an avalanche energy of 1 J.

Although we cannot speak to the long-term reliability or ruggedness of devices produced by other manufacturers, our evaluation of commercially available SiC MOSFETs shows there are now multiple suppliers capable of supplying production-level quantities of SiC MOSFETs. These devices appear to have acceptable reliability and parametric stability, which will surely encourage mainstream commercial adoption.

Commercial prospects

In addition to quality improvements, the past few years have seen tremendous commercial progress. Multiple SiC MOSFET suppliers are available to satisfy second-source concerns while also creating a competitive landscape that is good for both suppliers and users. Commercially available parts have been released from Wolfspeed, ROHM, ST Microelectronics, and Microsemi; the community can expect offerings soon from Littelfuse and Infineon.

Multi-chip power modules are also a hot topic in the SiC world. We believe many opportunities remain for SiC MOSFETs in discrete packages, as best layout practices of both the control and power circuits can easily extend discrete solutions to handle tens of kilowatts. Higher power levels and the motivation to simplify system design will drive SiC module development efforts, but the importance of optimizing parasitic inductance from the package, control circuit, and surrounding power components cannot be overstated.

Price is the eternal question when it comes to the commercial prospects of the SiC MOSFET. Our view on price erosion is favorable, based on two aspects of our approach: First, our devices are manufactured in an automotive-grade silicon CMOS fab. Second, the process runs on 150-mm wafers. Use of existing silicon CMOS fabs allows us to slash capital expenses and reduce operating expenses to keep costs down.

Furthermore, manufacturing on 150-mm wafers produces more than twice as many devices as on 100-mm wafers, which has a major impact on the per-die cost. Since the first announcement at Digi-Key six years ago, the price of a 1,200-V, 80-mΩ device in a TO-247 has fallen by more than 80%, even if the SiC MOSFET is still 2-3× more expensive than a comparable silicon IGBT. Designers are already viewing substantial system-level price benefits using SiC MOSFETs over Si IGBTs at today’s price levels, and we expect SiC MOSFET pricing will continue to fall as economy of scale takes hold with 150-mm wafers.

In all, the current state of the SiC MOSFET indicates resolution on major commercial impediments including price, reliability, ruggedness, and diversification of suppliers. Despite a price premium over Si IGBTs, the SiC MOSFET has already seen success thanks to cost-offsetting system-level benefits; the market share for this technology will rise sharply over the next few years as materials costs fall. After more than forty years of development effort, the SiC MOSFET finally appears poised for widespread commercial success and a substantial role in the green energy movement.

References

B. J. Baliga suggested the promise of SiC here: “Power semiconductor device figure of merit for high frequency applications.” IEEE Electron Device Letters 10 (10), 1989.

The merged p-n Schottky (MPS) structure debuted in: R. Rupp, M. Treu, S. Voss, F. Bjork, and T. Reimann, “2nd Generation SiC Schottky diodes: A new benchmark in SiC device ruggedness.” Proc. of IEEE International Symposium on Power Semiconductor Devices and ICs, 2006.

Documentation of SiC diode failure in time rates: T. Barbieri, “Technical Article: SiC Schottky Diode Device Design: Characterizing Performance & Reliability,” www.wolfspeed.com.

CSU researchers measured the transition region between pure SiC and grown SiO2: R. W. Kee, K. M. Geib, C. W. Wilmsen, and D. K. Ferry, “Interface characteristics of thermal SiO2 on SiC.” Journal of Vacuum Science and Technology 15 (4), 1978.

Several examples of improving knowledge of SiC interface states:

S. M. Tang, W. B. Berry, R. Kwor, M. V. Zeller, and L. G. Matus, “High frequency capacitance-voltage characteristics of thermally grown SiO2 films on -SiC.” Journal of the Electrochemical Society 137 (1), 1990.

H. Yano, T. Kimoto, and H. Matsunami, “Interface States of SiO2/SiC on (11-20) and (0001) Si Faces.” Materials Science Forum, vols. 353-356, 2001.

H. Li, S. Dimitrijev, H. B. Harrison, and D. Sweatman, “Interfacial characteristics of N2O and NO nitride SiO2 grown on SiC by rapid thermal processing.” Applied Physics Letters 70 (15), 1997.

S. Pantelides et al., “Si/SiO2 and SiC/SiO2 Interfaces for MOSFETs – Challenges and Advances.” Materials Science Forum, vols. 527-529, 2006.

NIST predictions of MOS oxide lifetime: Z. Chbili, K. P. Cheung, J. P. Campbell, J. Chbili, M. Lahbabi, D. Ioannou, and K. Matocha, “Time Dependent Dielectric Breakdown in high quality SiC MOS capacitors.” Materials Science Forum, vol. 858, 2015.