Power management ICs handle Xilinx ZU+ MPSoC FPGAs

AnDAPT launched six new PMIC solutions for powering up multiple supply rails of Xilinx ZU+ MPSoC FPGAs family and Xilinx-defined used cases.

Xilinx ZU+ MPSoC power architecture requires more than 25 power rails

AnDAPT has worked closely with Xilinx on the designs which speed the development of power supplies for a variety of industrial and computing applications, including industrial (motor control, Programmable Logic Control, Internet of Things (IoT)), medical, networking, and data center equipment.

Consider the Xilinx ZU+ MPSoC power architecture. The MPSoC IC requires more than 25 power rails among the PS (Processing System) and PL (Programmable Logic) domains (see Figure above). AnDAPT reference designs meet or exceed the Xilinx power performance specifications while achieving a reduction in solution PCB area by merging and reducing the number of devices used.

AnDAPT plans to release similar power solutions for the Kintex, Artix, Virtex, Versal, and Spartan families in the future.

AnDAPT has created an intuitive software tool, WebAmp R.D., to provide ready-to-use reference designs with optimum flexibility to users. The designs are based on Xilinx part numbers and use cases that have been defined by Xilinx for the ZU+ MPSoC FPGA device family. Users can apply these reference designs as-is or modify rail sequencing, revise output voltages, alter maximum current per rail, and disable unused rail if desired. If customized, WebAmp R.D.  provides all the necessary design documentation including design files, reference schematics, datasheets, BoM, and layout guide. If additional functionality is desired, such as system rails or glue logic, the generated design files can be used on the web app software tool for additional modifications.

The AmP IC uses a compact 5mm x 5mm package and a high level of integration in order to provide a best-in-class system solution to power Xilinx FPGAs. All products incorporate a single/two-phase DrMOS controller (up to 70A), multiple buck converters (10A / 6A), high current LDOs (up to 2A) or load switches (LDSW), 4 general-purpose LDOs (200mA), and power management features including fault protection and sequencing.

Reference designs can be used as-is by customers without any software programming or coding and offer best-in-class flexibility and time-to-market. AnDAPT reference designs map the entire ZU+ MPSoC family using one to three PMICs available on the “Reference Design PMIC” page on the AnDAPT website. The designs make it remarkably simple for the designer to pick and choose a solution and get it up and running within minutes for evaluation. Further, the WebAmP R.D. tool allows designers to scale a solution both up and down quickly depending on the FPGA design requirements. This makes the AnDAPT AmP IC solution ideal for Xilinx FPGA applications.

Evaluation boards for ZU+ MPSoC Cost Optimized with MGT devices use case is available now and Performance optimized use case evaluation board will be available in May 2021.